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MRF49XA
3.19 RX-TX Frequency Alignment
Method
The RX-TX frequency offset occurs due to the
differences in the actual reference frequency. To
minimize this error, the same crystal type and the same
PCB layout should be used for the crystal placement on
the RX and TX PCBs. Also, see Section 3.6, Crystal
Selection Guidelines .
To verify the possible RX-TX offset, it is recommended
to measure the CLK output of both transceivers with a
high level of accuracy. Do not measure the output at the
The actual RX-TX offset can be monitored by using the
AFC status data included in the STSREG of the
receiver. By reading out the STSREG, the actual
measured offset frequency can be reported. In order to
get accurate values, the AFC has to be disabled during
the read by clearing the FOFEN bit in AFCCREG.
The registers associated with RX-TX alignment
procedures are:
? STSREG (see Register 2-1 )
? AFCCREG (see Register 2-3 )
? RXCREG (see Register 2-7 )
RFXTL pin as the measurement process itself might
change the reference frequency. As the carrier
frequencies are derived from the reference frequency,
having identical reference frequencies, and nominal
frequency settings at the TX and RX side, there should
be no offset if the CLK signals have identical
frequencies.
The crystal oscillator load capacitor bank value is to
fine-tune the oscillator and minimize the offset. So the
process is to measure the clock output and parallel
change the value to minimize the offset.
?
PMCREG (see Register 2-13 )
DS70590C-page 72
Preliminary
? 2009-2011 Microchip Technology Inc.
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